Map the full HyperRAM and present DNA value in system info.#448
Draft
alees24 wants to merge 4 commits intolowRISC:mainfrom
Draft
Map the full HyperRAM and present DNA value in system info.#448alees24 wants to merge 4 commits intolowRISC:mainfrom
alees24 wants to merge 4 commits intolowRISC:mainfrom
Conversation
alees24
changed the title
Closed
alees24
force-pushed
the
hyperram-map-full
branch
3 times, most recently
from
f8acc39 to
9c90fdc
Compare
alees24
force-pushed
the
hyperram-map-full
branch
from
9c90fdc to
898221b
Compare
Parameterise the tagged portion of the HyperRAM so that it is possible to map the entire HyperRAM without exhausting the block RAMs of the A50T. Attempting to store a capability to the untagged region shall return a bus error to the LSU.
Tidy and explain `get_hyperram_fn_ptr.` Remove misleading and incorrect comment; this is no return value.
alees24
force-pushed
the
hyperram-map-full
branch
from
898221b to
0ce3021
Compare
Introduce a test for whether storing a capability to an untagged area of memory raises an exception as intended. Stores to areas of the HyperRAM that have associated tag bit storage should complete without an exception. In each case, check whether an exception does/does not occur as expected, and check the contents of the memory after the attempted store. An exception handler resumes execution after the faulting instruction but - importantly - is activated only for the very short time window during which we expect the possible exception to occur.
Present the following memory dimensions in the system info: - Main memory (SRAM). - HyperRAM. - Portion of the HyperRAM that is supported by tag bits an may thus store capabilities. Make the DNA value of the FPGA available in the system info IP block; this is a 57-bit value programmed into the FPGA which is described as 'most often unique', although there may be up to 32 devices in the FPGA family which have the same DNA value. Model the DNA_PORT/value in simulation, using a single value for all simulations.
alees24
force-pushed
the
hyperram-map-full
branch
from
0ce3021 to
b9c99f1
Compare
Contributor
|
Possibly failures in a longer soak test. Nothing obvious in the FPGA build. This was reported by @alees24 |
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
2 participants
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
@marnovandermaas We should be careful not to produce a release that offers more tagged memory than can be sustained in later revisions, please. Thoughts? This is the reason I've marked the PR as draft for now.Tagged portion has now been set at 4MiB so that half of the mapped HyperRAM is able to store capabilities, whilst leaving many more block RAMs available for future use.